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MEGA128CAN Datasheet, PDF (305/413 Pages) ATMEL Corporation – Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER
AT90CAN128
AT90CAN128 Boundary-
scan Order
Table 113 shows the Scan order between TDI and TDO when the Boundary-scan chain
is selected as data path. Bit 0 is the LSB; the first bit scanned in, and the first bit
scanned out. The scan order follows the pin-out order as far as possible. Therefore, the
bits of Port A is scanned in the opposite bit order of the other ports. Exceptions from the
rules are the Scan chains for the analog circuits, which constitute the most significant
bits of the scan chain regardless of which physical pin they are connected to. In Figure
145, PXn. Data corresponds to FF0, PXn. Control corresponds to FF1, and PXn.
Pullup_enable corresponds to FF2. Bit 2, 3, 4, and 5 of Port C is not in the scan chain,
since these pins constitute the TAP pins when the JTAG is enabled.
Table 113. AT90CAN128 Boundary-scan Order
Bit Number Signal Name
Comment
200
AC_IDLE
199
ACO
198
ACME
197
AINBG
196
COMP
195
ACLK
194
ACTEN
193
ADHSM
192
ADCBGEN
191
ADCEN
190
AMPEN
189
DAC_9
188
DAC_8
187
DAC_7
186
DAC_6
185
DAC_5
184
DAC_4
183
DAC_3
182
DAC_2
181
DAC_1
180
DAC_0
179
EXTCH
178
G10
177
G20
176
GNDEN
175
HOLD
174
IREFEN
173
MUXEN_7
172
MUXEN_6
171
MUXEN_5
170
MUXEN_4
Module
Comparator
ADC
4250E–CAN–12/04
305