MEGA128CAN Datasheet, PDF (53/413 Pages) ATMEL Corporation – Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER

Voltage Reference
Characteristics
Watchdog Timer
AT90CAN128
Table 22. Internal Voltage Reference Characteristics
Symbol Parameter
Condition Min. Typ. Max. Units
V_BG Bandgap reference voltage
t_BG
Bandgap reference start-up time
I_BG
Bandgap reference current
consumption
1.0
1.1
1.2
V
40
70
µs
15
µA
The Watchdog Timer is clocked from a separate On-chip Oscillator which runs at
1 MHz. This is the typical value at V_CC = 5V. See characterization data for typical values
at other V_CC levels. By controlling the Watchdog Timer prescaler, the Watchdog Reset
interval can be adjusted as shown in Table 24 on page 54. The WDR – Watchdog Reset
– instruction resets the Watchdog Timer. The Watchdog Timer is also reset when it is
disabled and when a Chip Reset occurs. Eight different clock cycle periods can be
selected to determine the reset period. If the reset period expires without another
Watchdog Reset, the AT90CAN128 resets and executes from the Reset Vector. For tim-
ing details on the Watchdog Reset, refer to Table 24 on page 54.
To prevent unintentional disabling of the Watchdog or unintentional change of time-out
period, two different safety levels are selected by the fuse WDTON as shown in Table
23. Refer to “Timed Sequences for Changing the Configuration of the Watchdog Timer”
on page 55 for details.
Table 23. WDT Configuration as a Function of the Fuse Settings of WDTON
WDTON
Safety WDT Initial
Level State
How to Disable the How to Change
WDT
Time-out
Unprogrammed
1
Disabled
Timed sequence
Timed sequence
Programmed
2
Enabled
Always enabled
Timed sequence
Figure 29. Watchdog Timer
WATCHDOG
OSCILLATOR
~1 MHz
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4250E–CAN–12/04