MEGA128CAN Datasheet, PDF (232/413 Pages) ATMEL Corporation – Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER

Phase Segment 1
Phase Segment 1 is used to compensate for edge phase errors.
This segment may be lengthened during re-synchronization.
Sample Point
The sample point is the point of time at which the bus level is read and interpreted as the
value of the respective bit. Its location is at the end of Phase Segment 1 (between the
two Phase Segments).
Phase Segment 2
This segment is also used to compensate for edge phase errors.
This segment may be shortened during re-synchronization, but the length has to be at
least as long as the Information Processing Time (IPT) and may not be more than the
length of Phase Segment 1.
Information Processing Time
It is the time required for the logic to determine the bit level of a sampled bit.
The IPT begins at the sample point, is measured in TQ and is fixed at 2TQ for the Atmel
CAN. Since Phase Segment 2 also begins at the sample point and is the last segment in
the bit time, PS2 minimum shall not be less than the IPT.
Bit Lengthening
As a result of resynchronization, Phase Segment 1 may be lengthened or Phase Seg-
ment 2 may be shortened to compensate for oscillator tolerances. If, for example, the
transmitter oscillator is slower than the receiver oscillator, the next falling edge used for
resynchronization may be delayed. So Phase Segment 1 is lengthened in order to
adjust the sample point and the end of the bit time.
Bit Shortening
If, on the other hand, the transmitter oscillator is faster than the receiver one, the next
falling edge used for resynchronization may be too early. So Phase Segment 2 in bit N
is shortened in order to adjust the sample point for bit N+1 and the end of the bit time
Synchronization Jump Width
The limit to the amount of lengthening or shortening of the Phase Segments is set by the
Resynchronization Jump Width.
This segment may not be longer than Phase Segment 2.
Programming the Sample Point
Programming of the sample point allows "tuning" of the characteristics to suit the bus.
Early sampling allows more Time Quanta in the Phase Segment 2 so the Synchroniza-
tion Jump Width can be programmed to its maximum. This maximum capacity to
shorten or lengthen the bit time decreases the sensitivity to node oscillator tolerances,
so that lower cost oscillators such as ceramic resonators may be used.
Late sampling allows more Time Quanta in the Propagation Time Segment which allows
a poorer bus topology and maximum bus length.
Synchronization
Hard synchronization occurs on the recessive-to-dominant transition of the start bit. The
bit time is restarted from that edge.
Re-synchronization occurs when a recessive-to-dominant edge doesn't occur within the
Synchronization Segment in a message.
Arbitration
The CAN protocol handles bus accesses according to the concept called “Carrier Sense
Multiple Access with Arbitration on Message Priority”.
During transmission, arbitration on the CAN bus can be lost to a competing device with
a higher priority CAN Identifier. This arbitration concept avoids collisions of messages
whose transmission was started by more than one node simultaneously and makes sure
the most important message is sent first without time loss.
232 AT90CAN128
4250E–CAN–12/04