MEGA128CAN Datasheet, PDF (325/413 Pages) ATMEL Corporation – Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER

AT90CAN128
Memory Programming
Program and Data
Memory Lock Bits
The AT90CAN128 provides six Lock bits which can be left unprogrammed (“1”) or can
be programmed (“0”) to obtain the additional features listed in Table 123. The Lock bits
can only be erased to “1” with the Chip Erase command.
Table 122. Lock Bit Byte⁽¹⁾
Lock Bit Byte
Bit No Description
Default Value
7
–
1 (unprogrammed)
6
–
1 (unprogrammed)
BLB12
5
Boot Lock bit
1 (unprogrammed)
BLB11
4
Boot Lock bit
1 (unprogrammed)
BLB02
3
Boot Lock bit
1 (unprogrammed)
BLB01
2
Boot Lock bit
1 (unprogrammed)
LB2
1
Lock bit
1 (unprogrammed)
LB1
0
Lock bit
1 (unprogrammed)
Note: 1. “1” means unprogrammed, “0” means programmed
Table 123. Lock Bit Protection Modes⁽¹⁾⁽²⁾
Memory Lock Bits
Protection Type
LB Mode LB2 LB1
1
1
1 No memory lock features enabled.
Further programming of the Flash and EEPROM is disabled
2
1
0 in Parallel and Serial Programming mode. The Fuse bits are
locked in both Serial and Parallel Programming mode.⁽¹⁾
Further programming and verification of the Flash and
3
0
0
EEPROM is disabled in Parallel and Serial Programming
mode. The Boot Lock bits and Fuse bits are locked in both
Serial and Parallel Programming mode.⁽¹⁾
BLB0 Mode BLB02 BLB01
1
1
1
No restrictions for SPM (Store Program Memory) or LPM
(Load Program Memory) accessing the Application section.
2
1
0 SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and
LPM executing from the Boot Loader section is not allowed
3
0
0 to read from the Application section. If Interrupt Vectors are
placed in the Boot Loader section, interrupts are disabled
while executing from the Application section.
LPM executing from the Boot Loader section is not allowed
4
0
1
to read from the Application section. If Interrupt Vectors are
placed in the Boot Loader section, interrupts are disabled
while executing from the Application section.
BLB1 Mode BLB12 BLB11
1
1
1
No restrictions for SPM or LPM accessing the Boot Loader
section.
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