MEGA128CAN Datasheet, PDF (59/413 Pages) ATMEL Corporation – Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER

AT90CAN128
...
0xF00C
...
...
jmp
SPM_RDY
;
; Store Program Memory Ready Handler
When the BOOTRST Fuse is programmed and the Boot section size set to 8K bytes, the
most typical and general program setup for the Reset and Interrupt Vector Addresses is:
;Address Labels Code
Comments
.org 0x0002
0x0002
jmp
EXT_INT0
; IRQ0 Handler
0x0004
jmp
PCINT0
; PCINT0 Handler
...
...
...
;
0x002C
jmp
SPM_RDY
; Store Program Memory Ready Handler
;
.org 0xF000
0xF000 RESET: ldi
r16,high(RAMEND) ; Main program start
0xF001
out
SPH,r16
; Set Stack Pointer to top of RAM
0xF002
ldi
r16,low(RAMEND)
0xF003
0xF004
out
SPL,r16
sei
; Enable interrupts
0xF005
<instr> xxx
When the BOOTRST Fuse is programmed, the Boot section size set to 8K bytes and the
IVSEL bit in the MCUCR Register is set before any interrupts are enabled, the most typ-
ical and general program setup for the Reset and Interrupt Vector Addresses is:
;Address Labels Code
Comments
;
.org 0xF000
0xF000
0xF002
jmp
RESET
jmp
EXT_INT0
; Reset handler
; IRQ0 Handler
0xF004
jmp
PCINT0
; PCINT0 Handler
...
...
...
;
0xF044
jmp
SPM_RDY
; Store Program Memory Ready Handler
;
0xF046 RESET: ldi
r16,high(RAMEND) ; Main program start
0xF047
out
SPH,r16
; Set Stack Pointer to top of RAM
0xF048
ldi
r16,low(RAMEND)
0xF049
0xF04A
out
SPL,r16
sei
; Enable interrupts
0xF04B
<instr> xxx
Moving Interrupts
The General Interrupt Control Register controls the placement of the Interrupt Vector
Between Application and ^table.
Boot Space
MCU Control Register –
MCUCR
Bit
Read/Write
Initial Value
7
6
JTD
–
R/W
R
0
0
5
4
3
–
PUD
–
R
R/W
R
0
0
0
2
1
0
–
IVSEL
IVCE
MCUCR
R
R/W
R/W
0
0
0
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4250E–CAN–12/04