MEGA128CAN Datasheet, PDF (360/413 Pages) ATMEL Corporation – Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER

Table 138. Two-wire Serial Bus Requirements (Continued)
Symbol Parameter
Condition
Min
Max
Units
t_SU;STO Setup time for STOP condition
f_SCL ≤ 100 kHz
f_SCL > 100 kHz
4.0
–
µs
0.6
–
µs
t_BUF
Bus free time between a STOP and
START condition
f_SCL ≤ 100 kHz
4.7
–
µs
Notes:
1. In AT90CAN128, this parameter is characterized and not 100% tested.
2. Required only for f_SCL > 100 kHz.
3. C_b = capacitance of one bus line in pF.
4. f_CK = CPU clock frequency
5. This requirement applies to all AT90CAN128 Two-wire Serial Interface operation. Other devices connected to the Two-wire
Serial Bus need only obey the general f_SCL requirement.
6. The actual low period generated by the AT90CAN128 Two-wire Serial Interface is (1/f_SCL - 2/f_CK), thus f_CK must be greater
than 6 MHz for the low time requirement to be strictly met at f_SCL = 100 kHz.
7. The actual low period generated by the AT90CAN128 Two-wire Serial Interface is (1/f_SCL - 2/f_CK), thus the low time require-
ment will not be strictly met for f_SCL > 308 kHz when f_CK = 8 MHz. Still, AT90CAN128 devices connected to the bus may
communicate at full speed (400 kHz) with other AT90CAN128 devices, as well as any other device with a proper t_LOW accep-
tance margin.
Figure 170. Two-wire Serial Bus Timing
SCL
SDA
t_SU;STA
t_of
t_LOW
t_HD;STA
t_HIGH
t_LOW
t_HD;DAT
t_SU;DAT
t_r
t_SU;STO
t_BUF
360 AT90CAN128
4250E–CAN–12/04