MEGA128CAN Datasheet, PDF (410/413 Pages) ATMEL Corporation – Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER

TWI Register Description...................................................................................207
Using the TWI ................................................................................................... 211
Transmission Modes..........................................................................................214
Multi-master Systems and Arbitration............................................................... 227
Controller Area Network - CAN ....................................................... 229
Features............................................................................................................ 229
CAN Protocol .................................................................................................... 229
CAN Controller...................................................................................................234
CAN Channel.....................................................................................................235
Message Objects ...............................................................................................237
CAN Timer .........................................................................................................240
Error Management.............................................................................................241
Interrupts............................................................................................................ 243
CAN Register Description..................................................................................245
General CAN Registers .................................................................................... 246
MOb Registers.................................................................................................. 254
Examples of CAN Baud Rate Setting ............................................................... 260
Analog Comparator .......................................................................... 262
Overview........................................................................................................... 262
Analog Comparator Register Description ......................................................... 262
Analog Comparator Multiplexed Input .............................................................. 264
Analog to Digital Converter - ADC .................................................. 265
Features............................................................................................................ 265
Operation .......................................................................................................... 267
Starting a Conversion ....................................................................................... 267
Prescaling and Conversion Timing ................................................................... 268
Changing Channel or Reference Selection ...................................................... 271
ADC Noise Canceler......................................................................................... 272
ADC Conversion Result.................................................................................... 277
ADC Register Description................................................................................. 279
JTAG Interface and On-chip Debug System .................................. 284
Features............................................................................................................ 284
Overview........................................................................................................... 284
Test Access Port – TAP.................................................................................... 284
TAP Controller .................................................................................................. 286
Using the Boundary-scan Chain ....................................................................... 287
Using the On-chip Debug System .................................................................... 287
On-chip Debug Specific JTAG Instructions ...................................................... 288
On-chip Debug Related Register in I/O Memory .............................................. 288
Using the JTAG Programming Capabilities ...................................................... 289
Bibliography ...................................................................................................... 289
iv AT90CAN128
4250E–CAN–12/04