MEGA128CAN Datasheet, PDF (116/413 Pages) ATMEL Corporation – Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER

Input Capture Unit
about advanced counting sequences and waveform generation, see “Modes of Opera-
tion” on page 121.
The Timer/Counter Overflow Flag (TOVn) is set according to the mode of operation
selected by the WGMn3:0 bits. TOVn can be used for generating a CPU interrupt.
The Timer/Counter incorporates an Input Capture unit that can capture external events
and give them a time-stamp indicating time of occurrence. The external signal indicating
an event, or multiple events, can be applied via the ICPn pin or alternatively, via the
analog-comparator unit. The time-stamps can then be used to calculate frequency, duty-
cycle, and other features of the signal applied. Alternatively the time-stamps can be
used for creating a log of the events.
The Input Capture unit is illustrated by the block diagram shown in Figure 50. The ele-
ments of the block diagram that are not directly a part of the Input Capture unit are gray
shaded.
Figure 50. Input Capture Unit Block Diagram
DATA BUS (8-bit)
TEMP (8-bit)
ICRnH (8-bit)
ICRnL (8-bit)
WRITE
ICRn (16-bit Register)
TCNTnH (8-bit)
TCNTnL (8-bit)
TCNTn (16-bit Counter)
ICNC3
ICES3
ICP3
ICP1
ACO*
Analog
Comparator
Noise
Canceler
ACIC*
ICNC1
Noise
Canceler
Edge
Detector
ICES1
Edge
Detector
ICF3 (Int.Req.)
ICF1 (Int.Req.)
Note: The Analog Comparator Output (ACO) can only trigger the Timer/Counter1 IC Unit– not
Timer/Counter3.
When a change of the logic level (an event) occurs on the Input Capture pin (ICPn),
alternatively on the Analog Comparator output (ACO), and this change confirms to the
setting of the edge detector, a capture will be triggered. When a capture is triggered, the
16-bit value of the counter (TCNTn) is written to the Input Capture Register (ICRn). The
Input Capture Flag (ICFn) is set at the same system clock as the TCNTn value is copied
116 AT90CAN128
4250E–CAN–12/04