MEGA128CAN Datasheet, PDF (338/413 Pages) ATMEL Corporation – Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER

Pin Mapping
Table 133. Pin Mapping Serial Programming
Symbol
Pins
I/O
MOSI (PDI)
PE0
I
MISO (PDO)
PE1
O
SCK
PB1
I
Description
Serial Data in
Serial Data out
Serial Clock
Parameters
The Flash parameters are given in Table 131 on page 330 and the EEPROM parame-
ters in Table 132 on page 330.
SPI Serial Programming
When writing serial data to the AT90CAN128, data is clocked on the rising edge of SCK.
When reading data from the AT90CAN128, data is clocked on the falling edge of SCK.
To program and verify the AT90CAN128 in the serial programming mode, the following
sequence is recommended (See four byte instruction formats in Table 135):
1. Power-up sequence:
Apply power between V_CC and GND while RESET and SCK are set to “0”. In some
systems, the programmer can not guarantee that SCK is held low during power-up.
In this case, RESET must be given a positive pulse of at least two CPU clock cycles
duration after SCK has been set to “0”.
2. Wait for at least 20 ms and enable serial programming by sending the Programming
Enable serial instruction to pin MOSI.
3. The serial programming instructions will not work if the communication is out of syn-
chronization. When in sync. the second byte (0x53), will echo back when issuing the
third byte of the Programming Enable instruction. Whether the echo is correct or
not, all four bytes of the instruction must be transmitted. If the 0x53 did not echo
back, give RESET a positive pulse and issue a new Programming Enable
command.
4. The Flash is programmed one page at a time. The memory page is loaded one byte
at a time by supplying the 7 LSB of the address and data together with the Load
Program Memory Page instruction. To ensure correct loading of the page, the data
low byte must be loaded before data high byte is applied for a given address. The
Program Memory Page is stored by loading the Write Program Memory Page
instruction with the 9 MSB of the address. If polling is not used, the user must wait at
least t_{WD_FLASH} before issuing the next page. (See Table 134.) Accessing the serial
programming interface before the Flash write operation completes can result in
incorrect programming.
5. The EEPROM array is programmed one byte at a time by supplying the address
and data together with the appropriate Write instruction. An EEPROM memory loca-
tion is first automatically erased before new data is written. If polling is not used, the
user must wait at least t_{WD_EEPROM} before issuing the next byte. (See Table 134.) In
a chip erased device, no 0xFFs in the data file(s) need to be programmed.
6. Any memory location can be verified by using the Read instruction which returns the
content at the selected address at serial output MISO.
7. At the end of the programming session, RESET can be set high to commence nor-
mal operation.
8. Power-off sequence (if needed):
Set RESET to “1”.
Turn V_CC power off.
338 AT90CAN128
4250E–CAN–12/04