MEGA128CAN Datasheet, PDF (108/413 Pages) ATMEL Corporation – Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER

16-bit Timer/Counter (Timer/Counter1 and Timer/Counter3)
The 16-bit Timer/Counter unit allows accurate program execution timing (event man-
agement), wave generation, and signal timing measurement. The main features are:
Features
• True 16-bit Design (i.e., Allows 16-bit PWM)
• Three independent Output Compare Units
• Double Buffered Output Compare Registers
• One Input Capture Unit
• Input Capture Noise Canceler
• Clear Timer on Compare Match (Auto Reload)
• Glitch-free, Phase Correct Pulse Width Modulator (PWM)
• Variable PWM Period
• Frequency Generator
• External Event Counter
• Four independent interrupt Sources (TOV1, OCF1A, OCF1B, and ICF1 for Timer/Counter1
- TOV3, OCF3A, OCF3B, and ICF3 for Timer/Counter3)
Overview
Many register and bit references in this section are written in general form.
• A lower case “n” replaces the Timer/Counter number, in this case 1 or 3. However,
when using the register or bit defines in a program, the precise form must be used,
i.e., TCNT1 for accessing Timer/Counter1 counter value and so on.
• A lower case “x” replaces the Output Compare unit channel, in this case A, B or C.
However, when using the register or bit defines in a program, the precise form must
be used, i.e., OCRnA for accessing Timer/Countern output compare channel A
value and so on.
A simplified block diagram of the 16-bit Timer/Counter is shown in Figure 48. For the
actual placement of I/O pins, refer to “Pinout AT90CAN128- TQFP” on page 4. CPU
accessible I/O Registers, including I/O bits and I/O pins, are shown in bold. The device-
specific I/O Register and bit locations are listed in the “16-bit Timer/Counter Register
Description” on page 131.
108 AT90CAN128
4250E–CAN–12/04