MEGA128CAN Datasheet, PDF (302/413 Pages) ATMEL Corporation – Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER

Table 111. Boundary-scan Signals for the ADC⁽¹⁾ (Continued)
Signal
Name
Direction
as Seen
from the
ADC
Description
Recommen-
ded Input
when not
in Use
Output Values when
Recommended Inputs
are Used, and CPU is
not Using the ADC
HOLD
Input
Sample & Hold signal.
1
1
Sample analog signal
when low. Hold signal
when high. If gain
stages are used, this
signal must go active
when ACLK is high.
IREFEN
Input
Enables Band-gap
0
0
reference as AREF
signal to DAC
MUXEN_7 Input
Input Mux bit 7
0
0
MUXEN_6 Input
Input Mux bit 6
0
0
MUXEN_5 Input
Input Mux bit 5
0
0
MUXEN_4 Input
Input Mux bit 4
0
0
MUXEN_3 Input
Input Mux bit 3
0
0
MUXEN_2 Input
Input Mux bit 2
0
0
MUXEN_1 Input
Input Mux bit 1
0
0
MUXEN_0 Input
Input Mux bit 0
1
1
NEGSEL_2 Input
Input Mux for negative
0
0
input for differential
signal, bit 2
NEGSEL_1 Input
Input Mux for negative
0
0
input for differential
signal, bit 1
NEGSEL_0 Input
Input Mux for negative
0
0
input for differential
signal, bit 0
PASSEN Input
Enable pass-gate of
1
1
gain stages.
PRECH
Input
Precharge output latch
1
1
of comparator. (Active
low)
302 AT90CAN128
4250E–CAN–12/04