MEGA128CAN Datasheet, PDF (343/413 Pages) ATMEL Corporation – Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER

AT90CAN128
Figure 164. State Machine Sequence for Changing the Instruction Word
1
Test-Logic-Reset
0
0
Run-Test/Idle ¹
Select-DR Scan ¹
0
1 _Capture-DR
0
Shift-DR
0
1
Exit1-DR
1
0
Pause-DR
0
1
0
Exit2-DR
1
Update-DR
1
0
Select-IR Scan ¹
0
1 _Capture-IR
0
Shift-IR
0
1
Exit1-IR
1
0
Pause-IR
0
1
0
Exit2-IR
1
Update-IR
1
0
AVR_RESET (0xC)
PROG_ENABLE (0x4)
PROG_COMMANDS (0x5)
The AVR specific public JTAG instruction for setting the AVR device in the Reset mode
or taking the device out from the Reset mode. The TAP controller is not reset by this
instruction. The one bit Reset Register is selected as data register. Note that the reset
will be active as long as there is a logic “one” in the Reset Chain. The output from this
chain is not latched.
The active states are:
• Shift-DR: The Reset Register is shifted by the TCK input.
The AVR specific public JTAG instruction for enabling programming via the JTAG port.
The 16-bit Programming Enable Register is selected as data register. The active states
are the following:
• Shift-DR: The programming enable signature is shifted into the data register.
• Update-DR: The programming enable signature is compared to the correct value,
and Programming mode is entered if the signature is valid.
The AVR specific public JTAG instruction for entering programming commands via the
JTAG port. The 15-bit Programming Command Register is selected as data register.
The active states are the following:
4250E–CAN–12/04
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