MEGA128CAN Datasheet, PDF (159/413 Pages) ATMEL Corporation – Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER

AT90CAN128
General Timer/Counter
Control Register – GTCCR
For Timer/Counter2, the possible prescaled selections are: clk_T2S/8, clk_T2S/32, clk_T2S/64,
clk_T2S/128, clk_T2S/256, and clk_T2S/1024. Additionally, clk_T2S as well as 0 (stop) may be
selected. Setting the PSR2 bit in GTCCR resets the prescaler. This allows the user to
operate with a predictable prescaler.
Bit
7
6
5
4
3
2
1
0
TSM
–
–
–
–
–
PSR2 PSR310 GTCCR
Read/Write
R/W
R
R
R
R
R
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
• Bit 1 – PSR2: Prescaler Reset Timer/Counter2
When this bit is one, the Timer/Counter2 prescaler will be reset. This bit is normally
cleared immediately by hardware. If the bit is written when Timer/Counter2 is operating
in asynchronous mode, the bit will remain one until the prescaler has been reset. The bit
will not be cleared by hardware if the TSM bit is set. Refer to the description of the “Bit 7
– TSM: Timer/Counter Synchronization Mode” on page 92 for a description of the
Timer/Counter Synchronization mode.
4250E–CAN–12/04
159