AMD-K6-2E Datasheet, PDF (19/332 Pages) Advanced Micro Devices – AMD-K6™-2E Embedded Processor

22529B/0—January 2000
Preliminary Information
AMD-K6™-2E Processor Data Sheet
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AMD-K6™-2E Processor
The following are key features of the AMD-K6™-2E processor:
s Advanced 6-Issue RISC86^® Superscalar Microarchitecture
• Ten parallel specialized execution units
• Multiple sophisticated x86-to-RISC86 instruction decoders
• Advanced two-level branch prediction
• Speculative execution
• Out-of-order execution
• Register renaming and data forwarding
• Up to six RISC86 instructions per clock
s Large on-chip split 64-Kbyte level-one (L1) cache
• 32-Kbyte instruction cache with additional 20 Kbytes of predecode cache
• 32-Kbyte writeback dual-ported data cache
• Two-way set associative
• MESI protocol support
s 3DNow!™ technology
• Additional instructions to improve 3D graphics and multimedia performance
• Separate multiplier and ALU for superscalar instruction execution
s 321-pin ceramic pin grid array (CPGA) package
s Socket 7 platform compatible, 66-MHz frontside bus
s Super7™ platform compatible, 100-MHz frontside bus supported on the 300-MHz,
350-MHz, and 400-MHz versions of the AMD-K6-2E processor
s High-performance industry-standard MMX™ instructions
• Dual integer ALU for superscalar execution
s High-performance IEEE 754-compatible and 854-compatible floating-point unit
s Industry-standard system management mode (SMM)
s IEEE 1149.1 boundary scan
s x86 binary software compatibility
s Low-power 0.25-micron process technology
• Split-plane power with support for full 3.3 V I/O
• Available with a low-power 1.9-V core voltage and extended temperature rating
or with a standard-power 2.2-V core voltage and standard temperature rating
Chapter 1
AMD-K6™-2E Processor
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