AMD-K6-2E Datasheet, PDF (143/332 Pages) Advanced Micro Devices – AMD-K6™-2E Embedded Processor

22529B/0—January 2000
Preliminary Information
AMD-K6™-2E Processor Data Sheet
5.49
TMS (Test Mode Select)
Pin Attribute
Pin Location
Summary
Input, Internal Pullup
P-34
TMS specifies the test function and sequence of state changes
for boundary-scan testing using the Test Access Port (TAP). See
“Boundary-Scan Test Access Port (TAP)” on page 229 for details
regarding the operation of the TAP controller.
Sampled
The processor samples TMS on every rising TCK edge. If TMS is
sampled High for five or more consecutive clocks, the TAP
controller enters its Test-Logic-Reset state, regardless of the
controller state. This action is the same as that achieved by
asserting TRST#.
5.50
TRST# (Test Reset)
Pin Attribute
Input, Internal Pullup
Pin Location
Summary
Sampled
Q-33
The assertion of TRST# initializes the Test Access Port (TAP) by
resetting its state machine to the Test-Logic-Reset state. See
“Boundary-Scan Test Access Port (TAP)” on page 229 for details
regarding the operation of the TAP controller.
TRST# is a completely asynchronous input that does not
require a minimum setup and hold time relative to TCK. See
Table 64 on page 280 for the minimum pulse width
requirement.
Chapter 5
Signal Descriptions
125