AMD-K6-2E Datasheet, PDF (165/332 Pages) Advanced Micro Devices – AMD-K6™-2E Embedded Processor

22529B/0—January 2000
Preliminary Information
AMD-K6™-2E Processor Data Sheet
Misaligned I/O Read
and Write
Table 26 shows the misaligned I/O read and write cycle order
executed by the AMD-K6-2E processor. In Figure 57, the
least-significant bytes (LSBs) are transferred first. Immediately
after the processor samples BRDY# asserted, it drives the
second bus cycle to transfer the most-significant bytes (MSBs)
to complete the misaligned bus cycle.
Table 26. Bus-Cycle Order During Misaligned I/O Transfers
Type of Access
I/O Read
I/O Write
First Cycle
LSBs
LSBs
Second Cycle
MSBs
MSBs
CLK
A[31:3]
BE[7:0]#
ADS#
M/IO#
D/C#
W/R#
SCYC
D[63:0]
BRDY#
Misaligned I/O Read
Misaligned I/O Write
ADDR DATA DATA IDLE ADDR DATA DATA IDLE ADDR DATA DATA DATA IDLE ADDR DATA DATA DATA IDLE
LSB
MSB
LSB
MSB
Figure 57. Misaligned I/O Transfer
Chapter 6
Bus Cycles
147