AMD-K6-2E Datasheet, PDF (150/332 Pages) Advanced Micro Devices – AMD-K6™-2E Embedded Processor

AMD-K6™-2E Processor Data Sheet
Preliminary Information
22529B/0—January 2000
5.56
Bus Cycle Definitions
Table 22. Bus Cycle Definition
Bus Cycle Initiated
Code Read, Instruction Cache Line Fill
Code Read, Noncacheable
Code Read, Noncacheable
Encoding for Special Cycle
Interrupt Acknowledge
I/O Read
I/O Write
Memory Read, Data Cache Line Fill
Memory Read, Noncacheable
Memory Read, Noncacheable
Memory Write, Data Cache Writeback
Memory Write, Noncacheable
Notes:
x means “don’t care”.
Generated by CPU
M/IO#
1
1
1
0
0
0
0
1
1
1
1
1
D/C#
0
0
0
0
0
1
1
1
1
1
1
1
W/R#
0
0
0
1
0
0
1
0
0
0
1
1
CACHE#
0
1
x
1
1
1
1
0
1
x
0
1
Generated
by System Logic
KEN#
0
x
1
x
x
x
x
0
x
1
x
x
Table 23. Special Cycles
Special Cycle
Stop Grant
11 1 1 1 1 0 1 1 0 0 1
1
x
Flush Acknowledge
(FLUSH# sampled asserted) ^{0 1 1 1 0 1 1 1 1}
0
0
1
1
x
Writeback (WBINVD
instruction)
01 1 1 1 0 1 1 1 0 0 1
1
x
Halt
01 1 1 1 1 0 1 1 0 0 1
1
x
Flush (INVD, WBINVD
instruction)
01 1 1 1 1 1 0 1 0 0 1
1
x
Shutdown
01 1 1 1 1 1 1 0 0 0 1
1
x
Notes:
x means “don’t care”.
132
Signal Descriptions
Chapter 5