AMD-K6-2E Datasheet, PDF (100/332 Pages) Advanced Micro Devices – AMD-K6™-2E Embedded Processor

AMD-K6™-2E Processor Data Sheet
Preliminary Information
22529B/0—January 2000
Table 15. 3DNow!™ Instructions (continued)
Instruction Mnemonic
PFCMPGE mmreg1, mmreg2
PFCMPGE mmreg, mem64
PFCMPGT mmreg1, mmreg2
PFCMPGT mmreg, mem64
PFMAX mmreg1, mmreg2
PFMAX mmreg, mem64
PFMIN mmreg1, mmreg2
PFMIN mmreg, mem64
PFMUL mmreg1, mmreg2
PFMUL mmreg, mem64
PFRCP mmreg1, mmreg2
PFRCP mmreg, mem64
PFRCPIT1 mmreg1, mmreg2
PFRCPIT1 mmreg, mem64
PFRCPIT2 mmreg1, mmreg2
PFRCPIT2 mmreg, mem64
PFRSQIT1 mmreg1, mmreg2
PFRSQIT1 mmreg, mem64
PFRSQRT mmreg1, mmreg2
PFRSQRT mmreg, mem64
PFSUB mmreg1, mmreg2
PFSUB mmreg, mem64
PFSUBR mmreg1, mmreg2
PFSUBR mmreg, mem64
PI2FD mmreg1, mmreg2
PI2FD mmreg, mem64
PMULHRW mmreg1, mmreg2
PMULHRW mmreg1, mem64
PREFETCH mem8¹
PREFETCHW mem8^1,2
Prefix
Byte(s)
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh, 0Fh
0Fh
0Fh
Opcode
Byte
90h
90h
A0h
A0h
A4h
A4h
94h
94h
B4h
B4h
96h
96h
A6h
A6h
B6h
B6h
A7h
A7h
97h
97h
9Ah
9Ah
AAh
AAh
0Dh
0Dh
B7h
B7h
0Dh
0Dh
ModR/M
Byte
11-xxx-xxx
mm-xxx-xxx
11-xxx-xxx
mm-xxx-xxx
11-xxx-xxx
mm-xxx-xxx
11-xxx-xxx
mm-xxx-xxx
11-xxx-xxx
mm-xxx-xxx
11-xxx-xxx
mm-xxx-xxx
11-xxx-xxx
mm-xxx-xxx
11-xxx-xxx
mm-xxx-xxx
11-xxx-xxx
mm-xxx-xxx
11-xxx-xxx
mm-xxx-xxx
11-xxx-xxx
mm-xxx-xxx
11-xxx-xxx
mm-xxx-xxx
11-xxx-xxx
mm-xxx-xxx
11-xxx-xxx
mm-xxx-xxx
mm-000-xxx
mm-001-xxx
Decode RISC86
Type Operations
short meu
short mload, meu
short meu
short mload, meu
short meu
short mload, meu
short meu
short mload, meu
short meu
short mload, meu
short meu
short mload, meu
short meu
short mload, meu
short meu
short mload, meu
short meu
short mload, meu
short meu
short mload, meu
short meu
short mload, meu
short meu
short mload, meu
short meu
short mload, meu
short meu
short mload, meu
vector load
vector load
Notes:
1. For PREFETCH and PREFETCHW, the mem8 value refers to a byte address within the 32-byte line that will be prefetched.
2. PREFETCHW will be implemented in a future K86 processor. On the AMD-K6-2E processor, this instruction performs in the same
manner as the PREFETCH instruction.
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Software Environment
Chapter 3