AMD-K6-2E Datasheet, PDF (140/332 Pages) Advanced Micro Devices – AMD-K6™-2E Embedded Processor

AMD-K6™-2E Processor Data Sheet
Preliminary Information
22529B/0—January 2000
5.44
SMIACT# (System Management Interrupt Active)
Pin Attribute
Pin Location
Summary
Output
AG-03
The processor acknowledges the assertion of SMI# with the
assertion of SMIACT# to indicate that the processor has
entered system management mode (SMM). The system logic
can use SMIACT# to enable SMM memory. See “SMI# (System
Management Interrupt)” on page 121 for more details.
See “System Management Mode (SMM)” on page 217 for more
details regarding SMM.
Driven
The processor asserts SMIACT# after the last BRDY# of the last
pending bus cycle is sampled asserted (including all pending
write cycles) and after EWBE# is sampled asserted (if EWBE#
is masked off, then SMIACT# is not affected by EWBE#).
SMIACT# remains asserted until after the last BRDY# of the
last pending bus cycle associated with exiting SMM is sampled
asserted.
SMIACT# remains asserted during any flush, internal snoop, or
writeback cycle due to an inquire cycle.
122
Signal Descriptions
Chapter 5