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PIC18F6525_13 Datasheet, PDF (99/400 Pages) Microchip Technology – 64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D | |||
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PIC18F6525/6621/8525/8621
REGISTER 9-11:
IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
U-0
R/W-1
U-0
R/W-1 R/W-1 R/W-1
â
CMIP
â
EEIP
BCLIP LVDIP
bit 7
R/W-1
TMR3IP
R/W-1
CCP2IP
bit 0
bit 7
Unimplemented: Read as â0â
bit 6
CMIP: Comparator Interrupt Priority bit
1 = High priority
0 = Low priority
bit 5
Unimplemented: Read as â0â
bit 4
EEIP: Data EEPROM/Flash Write Operation Interrupt Priority bit
1 = High priority
0 = Low priority
bit 3
BCLIP: Bus Collision Interrupt Priority bit
1 = High priority
0 = Low priority
bit 2
LVDIP: Low-Voltage Detect Interrupt Priority bit
1 = High priority
0 = Low priority
bit 1
TMR3IP: TMR3 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
bit 0
CCP2IP: ECCP2 Interrupt Priority bit
1 = High priority
0 = Low priority
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
â1â = Bit is set
U = Unimplemented bit, read as â0â
â0â = Bit is cleared x = Bit is unknown
ï£ 2003-2013 Microchip Technology Inc.
DS39612C-page 99
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