PIC18F6525_13 Datasheet, PDF (85/400 Pages) Microchip Technology – 64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D

PIC18F6525/6621/8525/8621
8.0 8 x 8 HARDWARE MULTIPLIER
8.1 Introduction
An 8 x 8 hardware multiplier is included in the ALU of the
PIC18F6525/6621/8525/8621 devices. By making the
multiply a hardware operation, it completes in a single
instruction cycle. This is an unsigned multiply that gives
a 16-bit result. The result is stored in the 16-bit product
register pair (PRODH:PRODL). The multiplier does not
affect any flags in the ALUSTA register.
Making the 8 x 8 multiplier execute in a single cycle
gives the following advantages:
• Higher computational throughput
• Reduces code size requirements for multiply
algorithms
The performance increase allows the device to be used
in applications previously reserved for Digital Signal
Processors.
Table 8-1 shows a performance comparison between
Enhanced devices using the single-cycle hardware
multiply and performing the same function without the
hardware multiply.
8.2 Operation
Example 8-1 shows the sequence to do an 8 x 8
unsigned multiply. Only one instruction is required
when one argument of the multiply is already loaded in
the WREG register.
Example 8-2 shows the sequence to do an 8 x 8 signed
multiply. To account for the signed bits of the
arguments, each argument’s Most Significant bit (MSb)
is tested and the appropriate subtractions are done.
EXAMPLE 8-1:
MOVF ARG1, W
MULWF ARG2
8 x 8 UNSIGNED
MULTIPLY ROUTINE
;
; ARG1 * ARG2 ->
; PRODH:PRODL
EXAMPLE 8-2:
MOVF ARG1, W
MULWF ARG2
BTFSC ARG2, SB
SUBWF PRODH, F
MOVF ARG2, W
BTFSC ARG1, SB
SUBWF PRODH, F
8 x 8 SIGNED MULTIPLY
ROUTINE
;
; ARG1 * ARG2 ->
; PRODH:PRODL
; Test Sign Bit
; PRODH = PRODH
;
- ARG1
;
; Test Sign Bit
; PRODH = PRODH
;
- ARG2
TABLE 8-1: PERFORMANCE COMPARISON
Routine
Multiply Method
Program
Memory
(Words)
Without hardware multiply
13
8 x 8 unsigned
Hardware multiply
1
Without hardware multiply
33
8 x 8 signed
Hardware multiply
6
Without hardware multiply
21
16 x 16 unsigned
Hardware multiply
24
Without hardware multiply
52
16 x 16 signed
Hardware multiply
36
Cycles
(Max)
69
1
91
6
242
24
254
36
Time
@ 40 MHz @ 10 MHz @ 4 MHz
6.9 s
100 ns
9.1 s
600 ns
24.2 s
2.4 s
25.4 s
3.6 s
27.6 s
400 ns
36.4 s
2.4 s
96.8 s
9.6 s
102.6 s
14.4 s
69 s
1 s
91 s
6 s
242 s
24 s
254 s
36 s
 2003-2013 Microchip Technology Inc.
DS39612C-page 85