PIC18F6525_13 Datasheet, PDF (341/400 Pages) Microchip Technology – 64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D

PIC18F6525/6621/8525/8621
Param.
No
Symbol
Characteristics
167 Tacc
Address Valid to Data Valid
168 Toe
OE  to Data Valid
169
171
171A
TalL2oeH ALE to OE 
TalH2csL Chip Enable Active to ALE 
TubL2oeH AD Valid to Chip Enable Active
Min
Typ
Max
Units
0.75 TCY – 25
—
—
ns
—
0.5 TCY – 25 ns
0.625 TCY – 10 — 0.625 TCY + 10 ns
—
—
10
ns
0.25 TCY – 20
—
—
ns
FIGURE 27-8:
PROGRAM MEMORY WRITE TIMING DIAGRAM
Q1
Q2
Q3
Q4
OSC1
A<19:16>
BA0
AD<15:0>
ALE
CE
WRH or
WRL
UB or LB
Address
150
151
171
171A
157
Address
166
Data
153
156
154
Q1
Q2
Address
Address
157A
Operating Conditions: 2.0V < VCC < 5.5V, -40°C < TA < +125°C unless otherwise stated.
TABLE 27-10: PROGRAM MEMORY WRITE TIMING REQUIREMENTS
Param.
No
Symbol
Characteristics
Min
Typ Max Units
150 TadV2alL Address Out Valid to ALE (address setup time) 0.25 TCY – 10 —
—
ns
151 TalL2adl ALE  to Address Out Invalid (address hold time)
5
—
—
ns
153 TwrH2adl WRn  to Data Out Invalid (data hold time)
5
—
—
ns
154 TwrL
WRn Pulse Width
0.5 TCY – 5 0.5 TCY —
ns
156 TadV2wrH Data Valid before WRn (data setup time)
0.5 TCY – 10 —
—
ns
157 TbsV2wrL Byte Select Valid before WRn (byte select
setup time)
0.25 TCY
—
—
ns
157A TwrH2bsI WRn  to Byte Select Invalid (byte select hold time) 0.125 TCY – 5 —
—
ns
166 TalH2alH ALE  to ALE  (cycle time)
—
TCY
—
ns
 2003-2013 Microchip Technology Inc.
DS39612C-page 341