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PIC18F6525_13 Datasheet, PDF (236/400 Pages) Microchip Technology – 64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D
PIC18F6525/6621/8525/8621
The analog reference voltage is software selectable to
either the device’s positive and negative supply voltage
(VDD and VSS), or the voltage level on the RA3/AN3/
VREF+ pin and RA2/AN2/VREF- pin.
The A/D converter has a unique feature of being able
to operate while the device is in Sleep mode. To
operate in Sleep, the A/D conversion clock must be
derived from the A/D’s internal RC oscillator.
The output of the sample and hold is the input into the
converter which generates the result via successive
approximation.
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion is aborted.
Each port pin associated with the A/D converter can be
configured as an analog input (RA3 can also be a
voltage reference), or as a digital I/O. The ADRESH
and ADRESL registers contain the result of the A/D
conversion. When the A/D conversion is complete, the
result is loaded into the ADRESH/ADRESL registers,
the GO/DONE bit (ADCON0 register) is cleared and A/D
interrupt flag bit, ADIF, is set. The block diagram of the
A/D module is shown in Figure 20-1.
FIGURE 20-1:
A/D BLOCK DIAGRAM
10-bit
Converter
A/D
VAIN
(Input Voltage)
Reference
Voltage
VCFG1:VCFG0
VREF+
VREF-
AVDD
CHS3:CHS0
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
AN15(1)
AN14(1)
AN13(1)
AN12(1)
AN11
AN10
AN9
AN8
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
AVSS
Note 1: Channels AN15 through AN12 are not available on PIC18F6525/6621 devices.
2: I/O pins have diode protection to VDD and VSS.
DS39612C-page 236
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