PIC18F6525_13 Datasheet, PDF (281/400 Pages) Microchip Technology – 64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D

PIC18F6525/6621/8525/8621
25.1 Instruction Set
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Add Literal to W
[ label ] ADDLW k
0  k  255
(W) + k  W
N, OV, C, DC, Z
0000 1111 kkkk kkkk
The contents of W are added to the
8-bit literal ‘k’ and the result is placed in
W.
1
1
Q2
Read
literal ‘k’
Q3
Process
Data
Q4
Write to W
Example:
ADDLW
Before Instruction
W = 0x10
After Instruction
W = 0x25
0x15
ADDWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Add W to f
[ label ] ADDWF
0  f  255
d  [0,1]
a  [0,1]
(W) + (f)  dest
N, OV, C, DC, Z
f [,d [,a] f [,d [,a]
0010 01da ffff ffff
Add W to register ‘f’. If ‘d’ is ‘0’, the
result is stored in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’
(default). If ‘a’ is ‘0’, the Access Bank
will be selected. If ‘a’ is ‘1’, the BSR is
used.
1
1
Q2
Read
register ‘f’
Q3
Process
Data
Q4
Write to
destination
Example:
ADDWF
Before Instruction
W
=
REG =
After Instruction
W
=
REG =
0x17
0xC2
0xD9
0xC2
REG, 0, 0
 2003-2013 Microchip Technology Inc.
DS39612C-page 281