PIC18F6525_13 Datasheet, PDF (14/400 Pages) Microchip Technology – 64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D

PIC18F6525/6621/8525/8621
TABLE 1-2: PIC18F6525/6621/8525/8621 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
PIC18F6X2X PIC18F8X2X
Pin
Type
Buffer
Type
Description
PORTC is a bidirectional I/O port.
RC0/T1OSO/T13CKI
30
RC0
T1OSO
T13CKI
36
I/O
ST
Digital I/O.
O
—
Timer1 oscillator output.
I
ST
Timer1/Timer3 external clock input.
RC1/T1OSI/ECCP2/P2A
29
RC1
T1OSI
ECCP2⁽²⁾
P2A⁽²⁾
35
I/O
ST
Digital I/O.
I
CMOS
Timer1 oscillator input.
I/O
ST
Enhanced Capture 2 input, Compare 2
output, PWM 2 output.
O
—
ECCP2 output P2A.
RC2/ECCP1/P1A
33
RC2
ECCP1
P1A
43
I/O
ST
Digital I/O.
I/O
ST
Enhanced Capture 1 input, Compare 1
output, PWM 1 output.
O
—
ECCP1 output P1A.
RC3/SCK/SCL
RC3
SCK
SCL
34
44
I/O
ST
Digital I/O.
I/O
ST
Synchronous serial clock input/output for
SPI™ mode.
I/O
ST
Synchronous serial clock input/output for
I²C™ mode.
RC4/SDI/SDA
RC4
SDI
SDA
35
45
I/O
ST
Digital I/O.
I
ST
I/O
ST
SPI data in.
I²C data I/O.
RC5/SDO
RC5
SDO
36
46
I/O
ST
Digital I/O.
O
—
SPI data out.
RC6/TX1/CK1
RC6
TX1
CK1
31
37
I/O
ST
Digital I/O.
O
—
USART1 asynchronous transmit.
I/O
ST
USART1 synchronous clock
(see RX1/DT1).
RC7/RX1/DT1
RC7
RX1
DT1
32
38
I/O
ST
Digital I/O.
I
ST
USART1 asynchronous receive.
I/O
ST
USART1 synchronous data
(see TX1/CK1).
Legend: TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I = Input
O
= Output
P = Power
OD = Open-Drain (no P diode to VDD)
Note 1: Alternate assignment for ECCP2/P2A in PIC18F8525/8621 devices when CCP2MX (CONFIG3H<0>) is not set (all
Program Memory modes except Microcontroller).
2: Default assignment for ECCP2/P2A when CCP2MX is set (all devices).
3: External memory interface functions are only available on PIC18F8525/8621 devices.
4: Default assignment for P1B/P1C/P3B/P3C for PIC18F8525/8621 devices when ECCPMX (CONFIG3H<1>) is set and for
all PIC18F6525/6621 devices.
5: Alternate assignment for ECCP2/P2A in PIC18F8525/8621 devices when CCP2MX is not set (Microcontroller mode).
6: PORTH and PORTJ (and their multiplexed functions) are only available on PIC18F8525/8621 devices.
7: Alternate assignment for P1B/P1C/P3B/P3C for PIC18F8525/8621 devices when ECCPMX (CONFIG3H<1>) is not set.
8: AVDD must be connected to a positive supply and AVSS must be connected to a ground reference for proper operation of
the part in user or ICSP™ modes. See parameter D001 for details.
9: RG5 is multiplexed with MCLR and is only available when the MCLR Resets are disabled.
DS39612C-page 14
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