PIC18F6525_13 Datasheet, PDF (356/400 Pages) Microchip Technology – 64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D

PIC18F6525/6621/8525/8621
FIGURE 27-22: EUSART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
RC6/TX1/CK1
pin
RC7/RX1/DT1
pin
121
121
120
122
Note: Refer to Figure 27-4 for load conditions.
TABLE 27-23: EUSART SYNCHRONOUS TRANSMISSION REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min Max
120 TckH2dtV SYNC XMIT (Master and Slave)
Clock High to Data Out Valid
PIC18F6525/6621/ — 40
8525/8621
PIC18LF6X2X/8X2X — 100
121 Tckrf
Clock Out Rise Time and Fall Time PIC18F6525/6621/ — 20
(Master mode)
8525/8621
PIC18LF6X2X/8X2X — 50
122 Tdtrf
Data Out Rise Time and Fall Time PIC18F6525/6621/ — 20
8525/8621
PIC18LF6X2X/8X2X — 50
Units
ns
ns
ns
ns
ns
ns
Conditions
FIGURE 27-23: EUSART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
RC6/TX1/CK1
pin
RC7/RX1/DT1
pin
125
126
Note: Refer to Figure 27-4 for load conditions.
TABLE 27-24: EUSART SYNCHRONOUS RECEIVE REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min Max
125 TdtV2ckl SYNC RCV (Master and Slave)
Data Hold before CKx  (DTx hold time)
10
—
126 TckL2dtl Data Hold after CKx  (DTx hold time)
15
—
Units
ns
ns
Conditions
DS39612C-page 356
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