PIC18F6525_13 Datasheet, PDF (338/400 Pages) Microchip Technology – 64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D

PIC18F6525/6621/8525/8621
27.4.3 TIMING DIAGRAMS AND SPECIFICATIONS
FIGURE 27-5:
EXTERNAL CLOCK TIMING (ALL MODES EXCEPT PLL)
Q4
Q1
Q2
Q3
Q4
Q1
OSC1
CLKO
1
3
3
4
4
2
TABLE 27-6: EXTERNAL CLOCK TIMING REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Max Units
Conditions
1A
FOSC
External CLKI Frequency⁽¹⁾ DC
25
MHz EC, ECIO⁽²⁾ (-40ºC to +85ºC)
DC
40
MHz EC, ECIO
Oscillator Frequency⁽¹⁾
DC
25
MHz EC, ECIO (+85ºC to +125ºC)
DC
4
MHz RC oscillator
0.1
4
MHz XT oscillator
4
25
MHz HS oscillator
4
10
MHz HS + PLL oscillator
4
6.25
MHz HS + PLL oscillator⁽²⁾
5
33
kHz LP Oscillator mode
1
TOSC
External CLKI Period⁽¹⁾
25
—
ns EC, ECIO
40
—
ns EC, ECIO⁽²⁾
Oscillator Period⁽¹⁾
40
—
ns EC, ECIO (+85ºC to +125ºC)
250
—
ns RC oscillator
250
10,000
ns XT oscillator
40
250
ns HS oscillator
100
250
ns HS + PLL oscillator
160
250
ns HS + PLL oscillator⁽²⁾
30
200
s LP oscillator
2
TCY
Instruction Cycle Time⁽¹⁾
100
—
ns TCY = 4/FOSC
3
TosL, External Clock in (OSC1)
30
—
ns XT oscillator
TosH
High or Low Time
2.5
—
s LP oscillator
10
—
ns HS oscillator
4
TosR, External Clock in (OSC1)
—
TosF
Rise or Fall Time
—
20
ns XT oscillator
50
ns LP oscillator
—
7.5
ns HS oscillator
Note 1:
2:
Instruction cycle period (TCY) equals four times the input oscillator time base period for all configurations
except PLL. All specified values are based on characterization data for that particular oscillator type under
standard operating conditions with the device executing code. Exceeding these specified limits may result
in an unstable oscillator operation and/or higher than expected current consumption. All devices are tested
to operate at “min.” values with an external clock applied to the OSC1/CLKI pin. When an external clock
input is used, the “max.” cycle time limit is “DC” (no clock) for all devices.
PIC18F6525/6621/8525/8621 devices using external memory interface.
DS39612C-page 338
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