PIC18F6525_13 Datasheet, PDF (108/400 Pages) Microchip Technology – 64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D

PIC18F6525/6621/8525/8621
TABLE 10-3: PORTB FUNCTIONS
Name
Bit#
Buffer
Function
RB0/INT0/FLT0
RB1/INT1
RB2/INT2
RB3/INT3/
ECCP2⁽³⁾/P2A⁽³⁾
bit 0 TTL/ST⁽¹⁾ Input/output pin or external interrupt input 0, ECCP1 PWM Fault input.
Internal software programmable weak pull-up.
bit 1 TTL/ST⁽¹⁾ Input/output pin or external interrupt input 1.
Internal software programmable weak pull-up.
bit 2 TTL/ST⁽¹⁾ Input/output pin or external interrupt input 2.
Internal software programmable weak pull-up.
bit 3 TTL/ST⁽⁴⁾ Input/output pin, external interrupt input 3, Enhanced Capture 2 input/
Compare 2 output/PWM 2 output or Enhanced PWM output P2A.
Internal software programmable weak pull-up.
RB4/KBI0
RB5/KBI1/PGM
RB6/KBI2/PGC
RB7/KBI3/PGD
bit 4
TTL Input/output pin (with interrupt-on-change).
Internal software programmable weak pull-up.
bit 5 TTL/ST⁽²⁾ Input/output pin (with interrupt-on-change).
Internal software programmable weak pull-up.
Low-Voltage ICSP™ enable pin.
bit 6 TTL/ST⁽²⁾ Input/output pin (with interrupt-on-change).
Internal software programmable weak pull-up.
Serial programming clock.
bit 7 TTL/ST⁽²⁾ Input/output pin (with interrupt-on-change).
Internal software programmable weak pull-up.
Serial programming data.
Legend: TTL = TTL input, ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.
3: Valid for PIC18F8525/8621 devices in all operating modes except Microcontroller mode when CCP2MX is
not set. RC1 is the default assignment for ECCP2/PA2 when CCP2MX is set in all devices; RE7 is the
alternate assignment for PIC18F8525/8621 devices in Microcontroller mode when CCP2MX is clear.
4: This buffer is a Schmitt Trigger input when configured as the ECCP2 input.
TABLE 10-4: SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
PORTB
RB7
RB6
RB5
RB4
RB3
RB2
LATB
LATB Data Output Register
TRISB PORTB Data Direction Register
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF
INTCON2 RBPU INTEDG0 INTEDG1 INTEDG2 INTEDG3 TMR0IP
INTCON3 INT2IP INT1IP INT3IE INT2IE INT1IE INT3IF
Legend: x = unknown, u = unchanged. Shaded cells are not used by PORTB.
RB1
INT0IF
INT3IP
INT2IF
RB0
RBIF
RBIP
INT1IF
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
1111 1111 1111 1111
0000 000x 0000 000u
1111 1111 1111 1111
1100 0000 1100 0000
DS39612C-page 108
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