PIC18F6525_13 Datasheet, PDF (12/400 Pages) Microchip Technology – 64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D

PIC18F6525/6621/8525/8621
TABLE 1-2: PIC18F6525/6621/8525/8621 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
PIC18F6X2X PIC18F8X2X
Pin
Type
Buffer
Type
Description
PORTA is a bidirectional I/O port.
RA0/AN0
RA0
AN0
24
30
I/O
TTL
Digital I/O.
I Analog
Analog input 0.
RA1/AN1
RA1
AN1
23
29
I/O
TTL
Digital I/O.
I Analog
Analog input 1.
RA2/AN2/VREF-
RA2
AN2
VREF-
22
28
I/O
TTL
Digital I/O.
I Analog
Analog input 2.
I Analog
A/D reference voltage (low) input.
RA3/AN3/VREF+
RA3
AN3
VREF+
21
27
I/O
TTL
Digital I/O.
I Analog
Analog input 3.
I Analog
A/D reference voltage (high) input.
RA4/T0CKI
RA4
T0CKI
28
34
I/O ST/OD
Digital I/O – Open-drain when configured
as output.
I
ST
Timer0 external clock input.
RA5/AN4/LVDIN
RA5
AN4
LVDIN
27
33
I/O
TTL
Digital I/O.
I Analog
Analog input 4.
I Analog
Low-Voltage Detect input.
RA6
See the OSC2/CLKO/RA6 pin.
Legend: TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I = Input
O
= Output
P = Power
OD = Open-Drain (no P diode to VDD)
Note 1: Alternate assignment for ECCP2/P2A in PIC18F8525/8621 devices when CCP2MX (CONFIG3H<0>) is not set (all
Program Memory modes except Microcontroller).
2: Default assignment for ECCP2/P2A when CCP2MX is set (all devices).
3: External memory interface functions are only available on PIC18F8525/8621 devices.
4: Default assignment for P1B/P1C/P3B/P3C for PIC18F8525/8621 devices when ECCPMX (CONFIG3H<1>) is set and for
all PIC18F6525/6621 devices.
5: Alternate assignment for ECCP2/P2A in PIC18F8525/8621 devices when CCP2MX is not set (Microcontroller mode).
6: PORTH and PORTJ (and their multiplexed functions) are only available on PIC18F8525/8621 devices.
7: Alternate assignment for P1B/P1C/P3B/P3C for PIC18F8525/8621 devices when ECCPMX (CONFIG3H<1>) is not set.
8: AVDD must be connected to a positive supply and AVSS must be connected to a ground reference for proper operation of
the part in user or ICSP™ modes. See parameter D001 for details.
9: RG5 is multiplexed with MCLR and is only available when the MCLR Resets are disabled.
DS39612C-page 12
 2003-2013 Microchip Technology Inc.