PIC18F6525_13 Datasheet, PDF (298/400 Pages) Microchip Technology – 64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D

PIC18F6525/6621/8525/8621
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Inclusive OR Literal with W
[ label ] IORLW k
0  k  255
(W) .OR. k  W
N, Z
0000 1001 kkkk kkkk
The contents of W are ORed with the
eight-bit literal ‘k’. The result is placed
in W.
1
1
Q2
Read
literal ‘k’
Q3
Process
Data
Q4
Write to W
Example:
IORLW
Before Instruction
W = 0x9A
After Instruction
W = 0xBF
0x35
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Inclusive OR W with f
[ label ] IORWF f [,d [,a]
0  f  255
d  [0,1]
a  [0,1]
(W) .OR. (f)  dest
N, Z
0001 00da ffff ffff
Inclusive OR W with register ‘f’. If ‘d’ is
‘0’, the result is placed in W. If ‘d’ is ‘1’,
the result is placed back in register ‘f’
(default). If ‘a’ is ‘0’, the Access Bank
will be selected, overriding the BSR
value. If ‘a’ = 1, then the bank will be
selected as per the BSR value (default).
1
1
Q2
Read
register ‘f’
Q3
Process
Data
Q4
Write to
destination
Example:
IORWF RESULT, 0, 1
Before Instruction
RESULT =
W
=
After Instruction
RESULT =
W
=
0x13
0x91
0x13
0x93
DS39612C-page 298
 2003-2013 Microchip Technology Inc.