PIC18F6525_13 Datasheet, PDF (226/400 Pages) Microchip Technology – 64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D

PIC18F6525/6621/8525/8621
19.2.5 BREAK CHARACTER SEQUENCE
The Enhanced USART module has the capability of
sending the special Break character sequences that
are required by the LIN bus standard. The Break
character transmit consists of a Start bit, followed by
twelve ‘0’ bits and a Stop bit. The frame Break charac-
ter is sent whenever the SENDB and TXEN bits
(TXSTAx<3> and TXSTAx<5>) are set while the
Transmit Shift register is loaded with data. Note that the
value of data written to TXREGx will be ignored and all
‘0’s will be transmitted.
The SENDB bit is automatically reset by hardware after
the corresponding Stop bit is sent. This allows the user
to preload the transmit FIFO with the next transmit byte
following the Break character (typically, the Sync
character in the LIN specification).
Note that the data value written to the TXREGx for the
Break character is ignored. The write simply serves the
purpose of initiating the proper sequence.
The TRMT bit indicates when the transmit operation is
active or Idle, just as it does during normal transmis-
sion. See Figure 19-9 for the timing of the Break
character sequence.
19.2.5.1 Break and Sync Transmit Sequence
The following sequence will send a message frame
header made up of a Break, followed by an auto-baud
Sync byte. This sequence is typical of a LIN bus
master.
1. Configure the EUSART for the desired mode.
2. Set the TXEN and SENDB bits to set up the
Break character.
3. Load the TXREGx with a dummy character to
initiate transmission (the value is ignored).
4. Write ‘55h’ to TXREGx to load the Sync
character into the transmit FIFO buffer.
5. After the Break has been sent, the SENDB bit is
reset by hardware. The Sync character now
transmits in the preconfigured mode.
When the TXREGx becomes empty, as indicated by
the TXxIF, the next data byte can be written to
TXREGx.
19.2.6 RECEIVING A BREAK CHARACTER
The Enhanced USART module can receive a Break
character in two ways.
The first method forces configuration of the baud rate
at a frequency of 9/13 the typical speed. This allows for
the Stop bit transition to be at the correct sampling
location (13 bits for Break versus Start bit and 8 data
bits for typical data).
The second method uses the Auto-Wake-up feature
described in Section 19.2.4 “Auto-Wake-up on Sync
Break Character”. By enabling this feature, the
EUSART will sample the next two transitions on RXx/
DTx, cause an RCxIF interrupt and receive the next
data byte followed by another interrupt.
Note that following a Break character, the user will
typically want to enable the Auto-Baud Rate Detect
feature. For both methods, the user can set the ABD bit
once the TXxIF interrupt is observed.
FIGURE 19-9:
SEND BREAK CHARACTER SEQUENCE
Write to TXREGx
BRG Output
(Shift Clock)
TXx (pin)
TXxIF bit
(Transmit Buffer
Reg. Empty Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
SENDB
(Transmit Shift
Reg. Empty Flag)
Dummy Write
Start Bit
Bit 0
SENDB sampled here
Bit 1
Break
Bit 11
Stop Bit
Auto-Cleared
DS39612C-page 226
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