PIC18F6525_13 Datasheet, PDF(212/400 Page) Microchip Technology – 64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D

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PIC18F6525_13 Datasheet, PDF (212/400 Pages) Microchip Technology – 64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D

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PIC18F6525/6621/8525/8621

TABLE 18-4: REGISTERS ASSOCIATED WITH I2Câ¢ OPERATION

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

POR, BOR

Value on

all other

Resets

INTCON

PIR1

PIE1

IPR1

GIE/GIEH

PSPIF(1)

PSPIE(1)

PSPIP(1)

PEIE/GIEL

ADIF

ADIE

ADIP

TMR0IE

RC1IF

RC1IE

RC1IP

INT0IE

TX1IF

TX1IE

TX1IP

RBIE

SSPIF

SSPIE

SSPIP

TMR0IF

CCP1IF

CCP1IE

CCP1IP

INT0IF

TMR2IF

TMR2IE

TMR2IP

RBIF 0000 000x 0000 000u

TMR1IF 0000 0000 0000 0000

TMR1IE 0000 0000 0000 0000

TMR1IP 1111 1111 1111 1111

TRISC PORTC Data Direction Register

1111 1111 1111 1111

TRISF

TRISF7 TRISF6 TRISF5 TRISF4 TRISF3 TRISF2 TRISF1 TRISF0 1111 1111 1111 1111

SSPBUF MSSP Receive Buffer/Transmit Register

xxxx xxxx uuuu uuuu

SSPADD MSSP Address Register in I2C Slave mode. MSSP Baud Rate Reload Register in I2C Master mode. 0000 0000 0000 0000

SSPCON1 WCOL

SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000 0000 0000

SSPSTAT

Legend:

Note 1:

SMP

CKE

D/A

P

S

R/W

UA

BF 0000 0000 0000 0000

x = unknown, u = unchanged, â = unimplemented, read as â0â. Shaded cells are not used by the MSSP in I2Câ¢ mode.

Enabled only in Microcontroller mode for PIC18F8525/8621 devices.

DS39612C-page 212

ï£ 2003-2013 Microchip Technology Inc.

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