PIC18F6525_13 Datasheet, PDF (262/400 Pages) Microchip Technology – 64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D

PIC18F6525/6621/8525/8621
REGISTER 24-4:
CONFIG3L: CONFIGURATION REGISTER 3 LOW (BYTE ADDRESS 300004h)⁽¹⁾
R/P-1
U-0
U-0
U-0
U-0
U-0
R/P-1
R/P-1
WAIT
—
—
—
—
—
PM1
PM0
bit 7
bit 0
bit 7
bit 6-2
bit 1-0
WAIT: External Bus Data Wait Enable bit
1 = Wait selections unavailable for table reads and table writes
0 = Wait selections for table reads and table writes are determined by WAIT1:WAIT0 bits
(MEMCOM<5:4>)
Unimplemented: Read as ‘0’
PM1:PM0: Processor Mode Select bits
11 = Microcontroller mode
10 = Microprocessor mode
01 = Microprocessor with Boot Block mode
00 = Extended Microcontroller mode
Note 1: This register is unimplemented for PIC18F6525/6621 devices; maintain these bits set.
Legend:
R = Readable bit
P = Programmable bit
-n = Value when device is unprogrammed
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
REGISTER 24-5:
CONFIG3H: CONFIGURATION REGISTER 3 HIGH (BYTE ADDRESS 300005h)
R/P-1
U-0
U-0
U-0
U-0
U-0
R/P-1
R/P-1
MCLRE⁽¹⁾
—
—
—
—
—
ECCPMX⁽²⁾ CCP2MX
bit 7
bit 0
bit 7
bit 6-2
bit 1
bit 0
MCLRE: MCLR Enable bit⁽¹⁾
1 = MCLR pin enabled, RG5 input pin disabled
0 = RG5 input enabled, MCLR disabled
Unimplemented: Read as ‘0’
ECCPMX: ECCP Mux bit⁽²⁾
1 = ECCP1 (P1B/P1C) and ECCP3 (P3B/P3C) PWM outputs are multiplexed with RE6 through
RE3
0 = ECCP1 (P1B/P1C) and ECCP3 (P3B/P3C) PWM outputs are multiplexed with RH7 through
RH4
CCP2MX: ECCP2 Mux bit
In Microcontroller mode:
1 = ECCP2 input/output is multiplexed with RC1
0 = ECCP2 input/output is multiplexed with RE7
In Microprocessor, Microprocessor with Boot Block and Extended Microcontroller modes
(PIC18F8525/8621 devices only):
1 = ECCP2 input/output is multiplexed with RC1
0 = ECCP2 input/output is multiplexed with RB3
Note 1: If MCLR is disabled, either disable Low-Voltage ICSP or hold RB5/KBI1/PGM low to
ensure proper entry into ICSP mode.
2: This register is unimplemented for PIC18F6525/6621 devices; maintain these bits
set.
Legend:
R = Readable bit
P = Programmable bit
-n = Value when device is unprogrammed
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
DS39612C-page 262
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