PIC18F6525_13 Datasheet, PDF (96/400 Pages) Microchip Technology – 64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D

PIC18F6525/6621/8525/8621
REGISTER 9-8:
PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2
U-0
R/W-0
U-0
R/W-0 R/W-0 R/W-0
—
CMIE
—
EEIE
BCLIE LVDIE
bit 7
R/W-0
TMR3IE
R/W-0
CCP2IE
bit 0
bit 7
Unimplemented: Read as ‘0’
bit 6
CMIE: Comparator Interrupt Enable bit
1 = Enables the comparator interrupt
0 = Disables the comparator interrupt
bit 5
Unimplemented: Read as ‘0’
bit 4
EEIE: Data EEPROM/Flash Write Operation Interrupt Enable bit
1 = Enables the write operation interrupt
0 = Disables the write operation interrupt
bit 3
BCLIE: Bus Collision Interrupt Enable bit
1 = Enables the bus collision interrupt
0 = Disables the bus collision interrupt
bit 2
LVDIE: Low-Voltage Detect Interrupt Enable bit
1 = Enables the Low-Voltage Detect interrupt
0 = Disables the Low-Voltage Detect interrupt
bit 1
TMR3IE: TMR3 Overflow Interrupt Enable bit
1 = Enables the TMR3 overflow interrupt
0 = Disables the TMR3 overflow interrupt
bit 0
CCP2IE: ECCP2 Interrupt Enable bit
1 = Enables the ECCP2 interrupt
0 = Disables the ECCP2 interrupt
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
DS39612C-page 96
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