PIC18F6525_13 Datasheet, PDF (346/400 Pages) Microchip Technology – 64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D

PIC18F6525/6621/8525/8621
TABLE 27-14: PARALLEL SLAVE PORT REQUIREMENTS (PIC18F8525/8621)
Param.
No.
Symbol
Characteristic
Min Max Units
Conditions
62
TdtV2wrH Data In Valid before WR  or CS 
(setup time)
20 — ns
25 — ns Extended Temp. range
63
TwrH2dtI WR  or CS  to Data–in PIC18F6525/6621/ 20 — ns
Invalid (hold time)
8525/8621
PIC18LF6X2X/8X2X 35 — ns
64
TrdL2dtV RD  and CS  to Data–out Valid
— 80 ns
— 90 ns Extended Temp. range
65
TrdH2dtI RD  or CS  to Data–out Invalid
10 30 ns
66
TibfINH Inhibit of the IBF Flag bit being cleared from
— 3 TCY
WR  or CS 
FIGURE 27-14: EXAMPLE SPI™ MASTER MODE TIMING (CKE = 0)
SS
SCK
(CKP = 0)
SCK
(CKP = 1)
70
71
72
78
79
SDO
80
MSb
79
bit 6 - - - - - -1
78
LSb
75, 76
SDI
MSb In
bit 6 - - - -1
74
73
Note: Refer to Figure 27-4 for load conditions.
LSb In
TABLE 27-15: EXAMPLE SPI™ MODE REQUIREMENTS (MASTER MODE, CKE = 0)
Param.
No.
Symbol
Characteristic
Min
Max Units Conditions
70
TssL2scH, SS  to SCK  or SCK  Input
TssL2scL
71
TscH
71A
SCK Input High Time
(Slave mode)
Continuous
Single Byte
72
TscL
72A
SCK Input Low Time
(Slave mode)
Continuous
Single Byte
Note 1: Requires the use of Parameter #73A.
2: Only if Parameter #71A and #72A are used.
TCY
—
1.25 TCY + 30 —
40
—
1.25 TCY + 30 —
40
—
ns
ns
ns (Note 1)
ns
ns (Note 1)
DS39612C-page 346
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