PIC18F6525_13 Datasheet, PDF (239/400 Pages) Microchip Technology – 64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D

PIC18F6525/6621/8525/8621
20.2 Selecting and Configuring
Acquisition Time
The ADCON2 register allows the user to select an
acquisition time that occurs each time the GO/DONE
bit is set. It also gives users the option to use an
automatically determined acquisition time.
Acquisition time may be set with the ACQT2:ACQT0
bits (ADCON2<5:3>), which provides a range of 2 to
20 TAD. When the GO/DONE bit is set, the A/D module
continues to sample the input for the selected acquisi-
tion time, then automatically begins a conversion.
Since the acquisition time is programmed, there may
be no need to wait for an acquisition time between
selecting a channel and setting the GO/DONE bit.
Automatic acquisition is selected when the
ACQT2:ACQT0 = 000. When the GO/DONE bit is set,
sampling is stopped and a conversion begins. The user
is responsible for ensuring the required acquisition time
has passed between selecting the desired input
channel and setting the GO/DONE bit. This option is
also the default Reset state of the ACQT2:ACQT0 bits
and is compatible with devices that do not offer
programmable acquisition times.
In either case, when the conversion is completed, the
GO/DONE bit is cleared, the ADIF flag is set and the
A/D begins sampling the currently selected channel
again. If an acquisition time is programmed, there is
nothing to indicate if the acquisition time has ended or
if the conversion has begun.
20.3 Selecting the A/D Conversion
Clock
The A/D conversion time per bit is defined as TAD. The
A/D conversion requires 12 TAD per 10-bit conversion.
The source of the A/D conversion clock is software
selectable. There are seven possible options for TAD:
• 2 TOSC
• 4 TOSC
• 8 TOSC
• 16 TOSC
• 32 TOSC
• 64 TOSC
• Internal RC oscillator
For correct A/D conversions, the A/D conversion clock
(TAD) must be selected to ensure a minimum TAD time
of 1.6 s.
Table 20-1 shows the resultant TAD times derived from
the device operating frequencies and the A/D clock
source selected.
TABLE 20-1: TAD vs. DEVICE OPERATING FREQUENCIES
AD Clock Source (TAD)
Operation
ADCS2:ADCS0
2 TOSC
000
4 TOSC
100
8 TOSC
001
16 TOSC
101
32 TOSC
010
64 TOSC
110
RC
x11
Maximum Device Frequency
PIC18F6525/6621/8525/8621
1.25 MHz
2.50 MHz
5.00 MHz
10.0 MHz
20.0 MHz
40.0 MHz
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 2003-2013 Microchip Technology Inc.
DS39612C-page 239