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HD6433937 Datasheet, PDF (76/521 Pages) Hitachi Semiconductor – Hardware Manual
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Bit 3: IRQ3 edge select (IEG3)
Bit 3 selects the input sensing of the IRQ3 pin and TMIF pin.
Bit 3
IEG3
0
1
Description
Falling edge of IRQ3 and TMIF pin input is detected
Rising edge of IRQ3 and TMIF pin input is detected
(initial value)
Bit 2: IRQ2 edge select (IEG2)
Bit 2 selects the input sensing of pin IRQ2.
Bit 2
IEG2
0
1
Description
Falling edge of IRQ2 pin input is detected
Rising edge of IRQ2 pin input is detected
(initial value)
Bit 1: IRQ1 edge select (IEG1)
Bit 3 selects the input sensing of the IRQ1 pin and TMIC pin.
Bit 1
IEG1
0
1
Description
Falling edge of IRQ1 and TMIC pin input is detected
Rising edge of IRQ1 and TMIC pin input is detected
(initial value)
Bit 0: IRQ0 edge select (IEG0)
Bit 0 selects the input sensing of the IRQ0 signal.
Bit 0
IEG0
Description
0
1
Note:
Falling edge of IRQ0 signal input is detected
(initial value)
Rising edge of IRQ0 signal input is detected
IRQ0 is an internal signal that performs interfacing to the FLEX™ decoder incorporated in
the chip.
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