HD6433937 Datasheet, PDF (272/521 Pages) Hitachi Semiconductor – Hardware Manual

5. Serial mode register (SMR)
Bit
Initial value
Read/Write
7
6
5
COM CHR
PE
0
0
0
R/W
R/W
R/W
4
3
PM STOP
0
0
R/W R/W
2
MP
0
R/W
1
CKS1
0
R/W
0
CKS0
0
R/W
SMR is an 8-bit register used to set the serial data transfer format and to select the clock source for
the baud rate generator.
SMR can be read or written by the CPU at any time.
SMR is initialized to H'00 upon reset, and in standby, watch or module standby mode.
Bit 7: Communication mode (COM)
Bit 7 selects whether SCI3 operates in asynchronous mode or synchronous mode.
Bit 7
COM
0
1
Description
Asynchronous mode
Synchronous mode
(initial value)
Bit 6: Character length (CHR)
Bit 6 selects either 7 or 8 bits as the data length to be used in asynchronous mode. In synchronous
mode the data length is always 8 bits, irrespective of the bit 6 setting.
Bit 6
CHR
Description
0
8-bit data/5-bit data*²
(initial value)
1
7-bit data*¹/5-bit data*²
Notes: 1. When 7-bit data is selected, the MSB (bit 7) of TDR is not transmitted.
2. When 5-bit data is selected, set both PE and MP to 1. The three most significant bits
(bits 7, 6, and 5) of TDR are not transmitted.
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