HD6433937 Datasheet, PDF (256/521 Pages) Hitachi Semiconductor – Hardware Manual

3. I/O configuration
Table 10-2 shows the SCI1 I/O configuration.
Table 10-2 SCI1 I/O Configuration
Name
SCI1 clock
SCI1 data input
SCI1 data output
Abbrev.
SCK₁
SI₁
SO₁
I/O
I/O
Input
Output
Function
SCI1 clock input/output
SCI1 receive data input
SCI1 transmit data output
4. Register configuration
Table 10-3 shows the SCI1 register configuration.
Table 10-3 Registers
Name
Abbrev.
R/W
Serial control register 1
SCR1
R/W
Serial control status register 1
SCSR1
R/W
Serial data register U
SDRU
R/W
Serial data register L
SDRL
R/W
Clock stop register 1
CKSTPR1
R/W
Initial Value
H'00
H'9C
Undefined
Undefined
H'FF
Address
H'FFA0
H'FFA1
H'FFA2
H'FFA3
H'FFFA
10.2.2 Register Descriptions
1. Serial control register 1 (SCR1)
Bit
Initial value
Read/Write
7
SNC1
0
R/W
6
SNC0
0
R/W
5
MRKON
0
R/W
4
LTCH
0
R/W
3
CKS3
0
R/W
2
CKS2
0
R/W
1
CKS1
0
R/W
0
CKS0
0
R/W
SCR1 is an 8-bit read/write register that controls the operating mode, serial clock source, and
prescaler division ratio.
Upon reset, SCR1 is initialized to H'00. If this register is written to during transfer, transfer will be
halted.
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