HD6433937 Datasheet, PDF (289/521 Pages) Hitachi Semiconductor – Hardware Manual

9. Clock stop register 1 (CKSTPR1)
Bit
7
6
5
4
3
2
1
0
S1CKSTP S31CKSTP S32CKSTP ADCKSTP TGCKSTP TFCKSTP TCCKSTP TACKSTP
Initial value
1
1
1
1
1
1
1
1
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
CKSTPR1 is an 8-bit read/write register that performs module standby mode control for peripheral
modules. Only the bits relating to SCI3 are described here. For details of the other bits, see the
sections on the relevant modules.
Bit 6: SCI31 module standby mode control (S31CKSTP)
Bit 6 controls setting and clearing of module standby mode for SCI31.
S31CKSTP Description
0
SCI31 is set to module standby mode*
1
SCI31 module standby mode is cleared
Note: * Setting to module standby mode resets all the registers in SCI31.
(initial value)
Bit 5: SCI32 module standby mode control (S32CKSTP)
Bit 5 controls setting and clearing of module standby mode for SCI32.
S32CKSTP Description
0
SCI32 is set to module standby mode*
1
SCI32 module standby mode is cleared
Note: * Setting to module standby mode resets all the registers in SCI32.
(initial value)
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