HD6433937 Datasheet, PDF (105/521 Pages) Hitachi Semiconductor – Hardware Manual

Oscillation
waveform
(OSC2)
System clock
(ø)
Oscillation
settling time
Standby time
Operating
mode
Standby mode,
watch mode,
or subactive
mode
Oscillation settling standby time
Active (high-speed) mode or
active (medium-speed) mode
Interrupt accepted
Figure 4-11 Oscillation Settling Standby Time
When standby mode, watch mode, or subactive mode is cleared by an interrupt or reset, and a
transition is made to active (high-speed/medium-speed) mode, the oscillation waveform begins to
change at the point at which the interrupt is accepted. Therefore, when an oscillator element is
connected in standby mode, watch mode, or subactive mode, since the system clock oscillator is
halted, the time from the point at which this oscillation waveform starts to change until the
amplitude of the oscillation waveform increases and the oscillation frequency stabilizes—that is,
the oscillation settling time—is required.
The oscillation settling time in the case of these state transitions is the same as the oscillation
settling time at power-on (the time from the point at which the power supply voltage reaches the
prescribed level until the oscillation stabilizes), specified by "oscillation settling time trc" in the
AC characteristics.
Meanwhile, once the system clock has halted, a standby time of at least 8 states is necessary in
order for the CPU and peripheral functions to operate normally.
Thus, the time required from interrupt generation until operation of the CPU and peripheral
functions is the sum of the above described oscillation settling time and standby time. This total
time is called the oscillation settling standby time, and is expressed by equation (1) below.
Oscillation settling standby time = oscillation settling time + standby time
= t + (8 to 16,384 states) ................. (1)
rc
93