HD6433937 Datasheet, PDF (275/521 Pages) Hitachi Semiconductor – Hardware Manual

Bits 1 and 0: Clock select 1 and 0 (CKS1, CKS0)
Bits 1 and 0 choose ø/64, ø/16, ø/2, or ø as the clock source for the baud rate generator.
For the relation between the clock source, bit rate register setting, and baud rate, see 8, Bit rate
register (BRR).
Bit 1
CKS1
Bit 0
CKS0
Description
0
0
ø clock
(initial value)
0
1
ø_W/2 clock*¹/ø_W clock*²
1
0
ø/16 clock
1
1
ø/64 clock
Notes: 1. ø_W/2 clock is selected in active (medium- and high-speed) or sleep (medium- and high-
speed) mode.
2. ø_W clock is selected in subactive or subsleep mode. SCI3 can be used only when the
ø_W/2 is selected as the CPU clock in subactive or subsleep mode.
6. Serial control register 3 (SCR3)
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
TIE
RIE
TE
RE MPIE TEIE CKE1 CKE0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
SCR3 is an 8-bit register for selecting transmit or receive operation, the asynchronous mode clock
output, interrupt request enabling or disabling, and the transmit/receive clock source.
SCR3 can be read or written by the CPU at any time.
SCR3 is initialized to H'00 upon reset, and in standby, watch or module standby mode.
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