HD6433937 Datasheet, PDF (6/521 Pages) Hitachi Semiconductor – Hardware Manual

2.8 Memory Map...................................................................................................................... 47
2.9 Application Notes............................................................................................................... 50
2.9.1 Notes on Data Access ........................................................................................... 50
2.9.2 Notes on Bit Manipulation .................................................................................... 52
2.9.3 Notes on Use of the EEPMOV Instruction ........................................................... 58
Section 3 Exception Handling ........................................................................................ 59
3.1 Overview ............................................................................................................................ 59
3.2 Reset................................................................................................................................... 59
3.2.1 Overview............................................................................................................... 59
3.2.2 Reset Sequence ..................................................................................................... 59
3.2.3 Interrupt Immediately after Reset ......................................................................... 60
3.3 Interrupts ............................................................................................................................ 61
3.3.1 Overview............................................................................................................... 61
3.3.2 Interrupt Control Registers ................................................................................... 63
3.3.3 External Interrupts................................................................................................. 72
3.3.4 Internal Interrupts.................................................................................................. 73
3.3.5 Interrupt Operations .............................................................................................. 74
3.3.6 Interrupt Response Time....................................................................................... 79
3.4 Application Notes............................................................................................................... 80
3.4.1 Notes on Stack Area Use ...................................................................................... 80
3.4.2 Notes on Rewriting Port Mode Registers ............................................................. 81
3.4.3 Notes on Interrupt Request Flag Clearing Methods ............................................. 83
Section 4 Clock Pulse Generators ................................................................................. 85
4.1 Overview ............................................................................................................................ 85
4.1.1 Block Diagram ...................................................................................................... 85
4.1.2 System Clock and Subclock.................................................................................. 85
4.2 System Clock Generator .................................................................................................... 86
4.3 Subclock Generator ............................................................................................................ 89
4.4 Prescalers ........................................................................................................................... 91
4.5 Note on Oscillators............................................................................................................. 92
4.5.1 Definition of Oscillation Settling Standby Time .................................................. 92
4.5.2 Notes on Use of Crystal Oscillator Element
(Excluding Ceramic Oscillator Element) .............................................................. 94
Section 5 Power-Down Modes....................................................................................... 95
5.1 Overview ............................................................................................................................ 95
5.1.1 System Control Registers...................................................................................... 98
5.2 Sleep Mode......................................................................................................................... 103
5.2.1 Transition to Sleep Mode ...................................................................................... 103
5.2.2 Clearing Sleep Mode............................................................................................. 103
5.2.3 Clock Frequency in Sleep (Medium-Speed) Mode............................................... 104
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