HD6433937 Datasheet, PDF (155/521 Pages) Hitachi Semiconductor – Hardware Manual

8.3 Port 2 [Chip Internal I/O Port]
8.3.1 Overview
Port 2 is a 5-bit I/O internal port. Figure 8-2 shows its functional configuration.
Port 2 is an internal function that performs interfacing to the FLEX™ decoder incorporated in the
chip. It cannot be connected to an IC outside the chip.
Port 2
P2₄
P2₃
P2₂/SO₁
P2₁/SI₁
P2₀/SCK₁
RESET
SS
MOSI
MISO
SCK
FLEX™
decoder
Note: : Connected inside the chip.
Figure 8-2 Port 2 Functional Configuration
8.3.2 Register Configuration and Description
Table 8-5 shows the port 2 register configuration.
Table 8-5 Port 2 Registers
Name
Port data register 2
Port control register 2
Port mode register 2
Port mode register 4
Abbrev.
R/W
PDR2
R/W
PCR2
W
PMR2
R/W
PMR4
R/W
Initial Value
H'00
H'00
H'D8
H'00
Address
H'FFD5
H'FFE5
H'FFC9
H'FFCB
143