HD6433937 Datasheet, PDF (55/521 Pages) Hitachi Semiconductor – Hardware Manual

2.6.2 Access to On-Chip Peripheral Modules
On-chip peripheral modules are accessed in two states or three states. The data bus width is 8 bits,
so access is by byte size only. This means that for accessing word data, two instructions must be
used. Figures 2-12 and 2-13 show the on-chip peripheral module access cycle.
Two-state access to on-chip peripheral modules
ø or ø_SUB
Bus cycle
T₁ state
T₂ state
Internal address bus
Address
Internal read signal
Internal data bus
(read access)
Read data
Internal write signal
Internal data bus
(write access)
Write data
Figure 2-12 On-Chip Peripheral Module Access Cycle (2-State Access)
43