HD6433937 Datasheet, PDF (411/521 Pages) Hitachi Semiconductor – Hardware Manual

Applicable
Values
Item
Symbol Pins
Min Typ Max Unit Test Condition
External clock t_CPr
rise time
External clock t_CPf
fall time
Pin RES low
t_REL
width
OSC₁
DX₁
OSC₁
DX₁
RES
—
—
10
ns V_CC = 2.7 V to 3.6 V
— — 25
V_CC = 1.8 V to 3.6 V
— — 55.0 ns
—
—
10
ns V_CC = 2.7 V to 3.6 V
— — 25
V_CC = 1.8 V to 3.6 V
— — 55.0 ns
10 —
—
t_cyc
Input pin high t_IH
width
IRQ₁ to
2
IRQ₄,
WKP ₀ to
WKP ₇,
ADTRG,
TMIC
TMIF, TMIG
—
—
t_cyc
t_subcyc
Input pin low
t_IL
width
IRQ₁ to
2
IRQ₄,
WKP ₀ to
WKP ₇,
ADTRG,
TMIC, TMIF,
TMIG
—
—
t_cyc
t_subcyc
UD pin minimum t_UDH
UD
modulation width t_UDL
4
—
—
t_cyc
t_subcyc
Note: * Selected with SA1 and SA0 of system clock control register 2 (SYSCR2).
Reference
Figure
Figure 13-1
Figure 13-1
Figure 13-1
Figure 13-1
Figure 13-2
Figure 13-3
Figure 13-3
Figure 13-4
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