HD6433937 Datasheet, PDF (43/521 Pages) Hitachi Semiconductor – Hardware Manual

2.5.3 Logic Operations
Table 2-6 describes the four instructions that perform logic operations.
Table 2-6 Logic Operation Instructions
Instruction Size*
Function
AND
B
Rd ∧ Rs → Rd, Rd ∧ #IMM → Rd
Performs a logical AND operation on a general register and another
general register or immediate data
OR
B
Rd ∨ Rs → Rd, Rd ∨ #IMM → Rd
Performs a logical OR operation on a general register and another
general register or immediate data
XOR
B
Rd ⊕ Rs → Rd, Rd ⊕ #IMM → Rd
Performs a logical exclusive OR operation on a general register and
another general register or immediate data
NOT
B
~ Rd → Rd
Obtains the one’s complement (logical complement) of general
register contents
Notes: * Size: Operand size
B: Byte
2.5.4 Shift Operations
Table 2-7 describes the eight shift instructions.
Table 2-7 Shift Instructions
Instruction Size*
Function
SHAL
B
SHAR
Rd shift → Rd
Performs an arithmetic shift operation on general register contents
SHLL
B
SHLR
Rd shift → Rd
Performs a logical shift operation on general register contents
ROTL
B
ROTR
Rd rotate → Rd
Rotates general register contents
ROTXL
B
ROTXR
Rd rotate through carry → Rd
Rotates general register contents through the C (carry) bit
Notes: * Size: Operand size
B: Byte
31