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HD6433937 Datasheet, PDF (372/521 Pages) Hitachi Semiconductor – Hardware Manual
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f2 f1 f0 s13 s12 s11 s10 s9 s8 s7 s6 s5 s4 s3 s2 s1 s0 Description
0 0 0*1 i8 i7 i6 i5 i4 i3 i2 i1 i0 C4 C3 C2 C1 C0 Local ID, Coverage
Zone
0 0 1*2 m3 m2 m1 m0 d4 d3 d2 d1 d0 Y4 Y3 Y2 Y1 Y0 Month, Day, Year
0 1 0*2 S2 S1 S0 M5 M4 M3 M2 M1 M0 H4 H3 H2 H1 H0 Second, Minute, Hour
0 1 1*1 Reserved by FLEX protocol for future use
1 0 0*1 Reserved by FLEX protocol for future use
1 0 1*2 z9 z8 z7 z6 z5 z4 z3 z2 z1 z0 A3 A2 A1 A0 System Message
1 1 0*1 Reserved by FLEX protocol for future use
1 1 1*1 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0 T3 T2 T1 T0 Country Code, Traffic
Management Flags
Notes: 1. Will be decoded only if the ABI bit is set.
2. Will be decoded only if the SBI or ABI bit is set.
12.4.2 Address Packet
The Address Field follows the Block Information Field in the FLEX protocol. It contains all of the
addresses in the frame.
If less than three bit errors are detected in a received address word and it matches an enabled
address assigned to the FLEX decoder, an Address Packet will be sent to the host processor. The
Address Packet contains assorted data about the address and its associated vector and message.
The ID of an Address Packet is 1 (decimal).
Table 12-20 Address Packet Bit Assignments
Byte 3
Byte 2
Byte 1
Byte 0
Bit 7
0
PA
AI 7
TOA
Bit 6
0
p1
AI 6
WN 6
Bit 5
0
p0
AI 5
WN 5
Bit 4
0
LA
AI 4
WN 4
Bit 3
0
x
AI 3
WN 3
Bit 2
0
x
AI 2
WN 2
Bit 1
0
x
AI 1
WN 1
Bit 0
1
x
AI 0
WN 0
PA: Priority Address. Set if the address was received as a priority address.
p: Phase on which the address was detected (0=a, 1=b, 2=c, 3=d)
LA: Long Address type. Set if the address was programmed in the FLEX decoder as a long
address.
AI: Address Index (valid values are 0 through 15 and 128 through 159). The index identifies
which of the addresses was detected. Values 0 through 15 correspond to the 16 programmable
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