HD6433937 Datasheet, PDF (127/521 Pages) Hitachi Semiconductor – Hardware Manual

Direct transition time = { (Number of SLEEP instruction execution states) + (number of internal
processing states) } × (t_cyc before transition) + (number of interrupt
exception handling execution states) × (t_cyc after transition)
.................................. (2)
Example: Direct transition time = (2 + 1) × 16t_osc + 14 × 2t_osc = 76t_osc (when ø/8 is selected as the
CPU operating clock)
Notation:
t_osc: OSC clock cycle time
t_cyc: System clock (ø) cycle time
3. Time for direct transition from subactive mode to active (high-speed) mode
A direct transition from subactive mode to active (high-speed) mode is performed by executing a
SLEEP instruction in subactive mode while bit SSBY is set to 1 and bit LSON is cleared to 0 in
SYSCR1, bit MSON is cleared to 0 and bit DTON is set to 1 in SYSCR2, and bit TMA3 is set to 1
in TMA. The time from execution of the SLEEP instruction to the end of interrupt exception
handling (the direct transition time) is given by equation (3) below.
Direct transition time = { (Number of SLEEP instruction execution states) + (number of internal
processing states) } × (t_subcyc before transition) + { (wait time set in STS2
to STS0) + (number of interrupt exception handling execution states) } ×
(t_cyc after transition)
........................ (3)
Example: Direct transition time = (2 + 1) × 8t_w + (8192 + 14) × 2t_osc= 24t_w + 16412t_osc (when
øw/8 is selected as the CPU operating clock, and wait time = 8192 states)
Notation:
t_osc:
t_w:
t_cyc:
t_subcyc:
OSC clock cycle time
Watch clock cycle time
System clock (ø) cycle time
Subclock (ø_SUB) cycle time
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