HD6433937 Datasheet, PDF (374/521 Pages) Hitachi Semiconductor – Hardware Manual

bit errors are detected (via BCH calculations, parity calculations, check character calculations, or
value validation) in the vector word the e bit will be set and the message words will not be sent.
1. Numeric Vector Packet
Table 12-21 Numeric Vector Packet Bit Assignments
Byte 3
Byte 2
Byte 1
Byte 0
Bit 7
0
e
x
n₀
Bit 6
WN₆
p₁
x
b₆
Bit 5
WN₅
p₀
K₃
b₅
Bit 4
WN₄
x
K₂
b₄
Bit 3
WN₃
x
K₁
b₃
Bit 2
WN₂
V₂
K₀
b₂
Bit 1
WN₁
V₁
n₂
b₁
Bit 0
WN₀
V₀
n₁
b₀
V: Vector type identifier.
V₂ V₁ V₀ Name
0 1 1 Standard NumericVector
Description
No special formatting of characters is specified
1 0 0 Special Format Numeric Vector Formatting of the received characters is predetermined
by special rules in the host.
1 1 1 Numbered Numeric Vector
The received information has been numbered by the
service provider to indicate all messages have been
properly received
WN: Word number of vector (2 - 87 decimal). Describes the location of the vector word in the
frame.
e: Set if more than 2 bit errors are detected in the word, if the check character calculation fails
after error correction has been performed, or if the vector value is determined to be invalid.
p: Phase on which the vector was found (0=a, 1=b, 2=c, 3=d)
K: Beginning check bits of the message.
n: Number of message words in the message including the second vector word for long addresses
(000 = 1 word message, 001 = 2 word message, etc.). For long addresses, the first message word is
located in the word location that immediately follows the associated vector.
b: Word number of message start in the message field (3-87 decimal). For long addresses, the
word number indicates the location of the second message word.
x: Unused bits. The value of these bits is not guaranteed.
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